课程名称︰交换电路与逻辑设计 课程性质︰系订必修 课程教师︰李君浩 简韶逸 李建模 卢奕璋 开课学院：电资学院 开课系所︰电机系 考试日期（年月日）︰2008.12.25 考试时限（分钟）：50分钟 是否需发放奖励金：是 试题 : 1.[10 points] Design a positive-triggered J-K flip-flop from S-R latches. 2.Solve the following problems. (a)[20 points] Design a 3-bit counter which counts in the sequences CBA=000, 111,001,110,010,101,011,100,000,111... with T flip-flops. (b)[10 points] Design a 3-bit counter, where two new input pins "count" and "clear_n" are added. The function of this new counter is shown as following table. (Hint: you don't have to re-design the counter. You can design it by modifying the circuits in (a).) clock count clear_n │ C+B+A+ ───────────┼──────── x x 0 │ 000 ↑　　 0 1 │ CBA ↑ 1 1 │Normal operation 3.A Mealy circuit examines a string of 0's and 1's applied to the X-input and generates an output Z=1 only when the input sequence, 1010, occurs. The output Z=1 is coincident with the second 0 of the input sequence, 1010. Example: X = 0 1 0 1 1 1 0 1 0 1 0 Z = 0 0 0 0 0 0 0 0 1 0 1 (a)[20 points] Please provide the state graph of the circuit. (b)[10 points] Please provide the state table of the circuit. (c)[20 points] If D flip-flops are used, please provide the input maps and input equations for the flip-flops; and the output map and output equation for Z. (d)[10 points] Please draw the circuit to implement this design. --

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